both sides getting the good ideas from each other.

to make things short:

1. AMD Phenom (and Barcelona) copied Intel Core 2 Duo's true 128-bit internal datapath.

2. AMD Phenom (and Barcelona) copied Intel Core 2 Duo's Fetch Cycle - 32 bytes (256 bits) of data per clock cycle.

3. L3 Shared Cache is old Intel server technology adopted by Phenom and Barcelona.

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both sides getting the good ideas from each other.

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now with Intel Nehalem:

1. adopted integrated memory controller concept.

2. made a hypertransport-like bus and calls it Quick-Path Interconnect.

3. native/true quad/octo-core.