Old hat? Previous years tech used standard definition stuff at an order of magnitude lower bandwidth. It's still kind of a big thing, though admittedly not as much as it was.
NXP (the semiconductor spin off of Philips) just showed off a new processor at CES 2008 called the PNX5100. Each PNX5100 has 3 Trimedia 5-way 32-bit VLIW processor cores running at 350MHz. Assuming that it has 5 independent floating point multiply-accumulators inside, that's 3.5 GFLOPS peak (2 operations x 350MHz x 5-way VLIW).
For comparison, each SPE in a Cell runs at 3.2GHz and performs 4-way SIMD floating point operations. What that means is that every single cycle it can execute 8 floating point operations. That's 25.6 GFLOPS peak (2 operations x 3.2GHz x 4-way SIMD).
In short, a single SPE has just over 7x the performance of a single Trimedia processor core, and a single Cell has 8 of them.
In truth, Cell is totally overkill for this and they're probably only using it out of convenience since they just purchased Sony's Cell fabrication department. In the long run, Toshiba will likely end up using their SpursEngine with only 3 to 4 SPEs operating at somewhere between 1.5 and 2GHz, which at the low end will still be just about 4 times more floating point performance compared to the next generation NXP media processors.
Register
>so old hat
Old hat? Previous years tech used standard definition stuff at an order of magnitude lower bandwidth. It's still kind of a big thing, though admittedly not as much as it was.
NXP (the semiconductor spin off of Philips) just showed off a new processor at CES 2008 called the PNX5100. Each PNX5100 has 3 Trimedia 5-way 32-bit VLIW processor cores running at 350MHz. Assuming that it has 5 independent floating point multiply-accumulators inside, that's 3.5 GFLOPS peak (2 operations x 350MHz x 5-way VLIW).
For comparison, each SPE in a Cell runs at 3.2GHz and performs 4-way SIMD floating point operations. What that means is that every single cycle it can execute 8 floating point operations. That's 25.6 GFLOPS peak (2 operations x 3.2GHz x 4-way SIMD).
In short, a single SPE has just over 7x the performance of a single Trimedia processor core, and a single Cell has 8 of them.
In truth, Cell is totally overkill for this and they're probably only using it out of convenience since they just purchased Sony's Cell fabrication department. In the long run, Toshiba will likely end up using their SpursEngine with only 3 to 4 SPEs operating at somewhere between 1.5 and 2GHz, which at the low end will still be just about 4 times more floating point performance compared to the next generation NXP media processors.